HARDWARE ACCELERATION
In-house FPGA boards and an extensible architecture.
SANTIZSANTIZ / ORIGINAL CHARACTERPANDASYSTEM MAP / SYSTEM MAP
Select a node to explore the path from market data to execution.
Receive original OMD-C and OMD-D tick data and distribute it through a single switching layer.
UNIT 02 / INSTITUTIONAL LOW LATENCY
End-to-end services for professional institutions: market data, FPGA processing, trade execution and HKEX data-centre co-location.
TALK TO THE TEAM ↗HARDWARE FIRST / HARDWARE FIRST
FPGA is programmable hardware. Circuits handle critical data paths for nanosecond-scale latency and high throughput.
In-house FPGA boards and an extensible architecture.
Hardware timestamps support path-level latency analysis.
Strategy server hosting and connectivity at the HKEX data centre.
These are product technical metrics. Actual performance may vary with hardware, network environment, exchange connectivity and market conditions.
NEXT MOVE / NEXT MOVE
Tell our technical team about your connectivity needs, hardware environment and goals.
HARDWARE FILE / HARDWARE & THROUGHPUT
Data mirroring and regeneration, PCIe data processing, all-hardware processing and order-book construction reduce reliance on host processing, with multi-channel parallel multicast.
Original-site technical metrics: million-level message throughput and zero jitter; 338ns trading uplink, 1ns jitter and 100,000 orders per second.
The 1.5-layer switch supports nanosecond timestamps and timestamps across multiple physical channels. The trading system supports all products listed on SEHK.
These are product technical metrics listed on the original site, not independent measurements of the current environment. Actual performance varies with hardware, network environment, exchange connectivity and market conditions.